Applicant has already proposed a variable reactance circuit which can be built into semiconductor integrated circuits (U.S. Pat. No. 4,587,500). There is shown in FIG. 7 an equivalent reactance circuit which is used for producing a negative reactance in the variable reactance circuit as disclosed in this U.S. Patent.
The equivalent reactance circuit comprises a first and second transistors 51 and 52 having emitters thereof connected in common, a variable current source 53 connected to the common emitter of the first and second transistors, a current mirror circuit 54 connected to the collectors of the first and second transistors, a resistor 55 connected between the bases of the first transistor 51 and the second transistor 52, and a capacitor 56 connected between the collector of the second transistor 52 and the base of the first transistor 51. The reactance circuit, as viewed from the output terminal 57 connected to the collector of the second transistor 52, operates as a negative equivalent reactance. Reactance X of the reactance circuit is expressed as follows: EQU X.apprxeq.-2 .omega. gmRC (1)
wherein .omega. is an angular frequency, gm is a mutual conductance of differential amplification circuit comprising the first and second transistors, R is a value of resistance of the resistor 55, and C is a capacitance of the capacitor 56. Also, the mutual conductance gm of the differential amplification circuit described above is expressed as follows: ##EQU1## wherein T is an absolute temperature, q is an electric charge amount of electron, K is Boltzmann's constant, .alpha. is a current amplification rate, and I is a current flowing into the variable current source 53.
Accordingly, the circuit shown in FIG. 7, as apparent from the equations (1) and (2), provides the variable reactance circuit having the negative capacitive reactance X which varies by changing the current value I of the variable current source 53. This reactance circuit can be easily formed on the IC and is thus advantageous.
However, there was such a likelihood that some oscillation might be occurred in the reactance circuit of FIG. 7 due to a reason that the circuit comprises a positive feedback loop returning to the base of the first transistor 51 by way of the collector of the first transistor, the current mirror circuit 54 and the capacitor 56, which will be described in below.
In particular, for acquisition of a large negative reactance, when the variable current source 53 is so adjusted to flow therein a large electric current to increase a gain of the differential amplification circuit composed of the first and second transistors 51, 52, and further when, for instance, the base voltage of the first transistor 51 is increased in accordance with signals connected to the output terminal 57, the collector current of the first transistor 51 will be increased, and the current at the input side (point M) of the current mirror circuit 54 will be increased. As a result, the current mirror circuit 54 permits current flow equivalent to that of the input side into the output side (point N). On the other hand, with increased base voltage of the first transistor 51, the collector current of the second transistor 52 will be decreased. The increase of the current at the output side of the current mirror circuit 54 and the decrease of the collector current of the second transistor 52 result in the voltage generated is at a high level at the output terminal 57, and this voltage is positively fed back to the base of the first transistor 51 through the capacitor 56. The formation of positive feedback loop becomes a cause of oscillations.
Although the U.S. Pat. No. 4,587,500 as referred in the above discloses the reactance circuit having a negative feedback loop, it produces only a positive reactance but fails to produce as a negative reactance.